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experimental parameters for second-level reliability qualification. Figure 59.3 contains a plot of temperature versus time along with explanations of the key experimental parameters. Data acquisition systems and/or event detectors (commonly referred to as glitch detectors) are employed to monitor resistance and/or scan for intermittent opens in real time. One of the early techniques for assessing solder joint integrity during thermal cycling was to remove parts periodically from the test chamber and measure resistance manually at room temperature. The major risk associated with this technique is that opens are observed only at temperature extremes when the deformations due to CTE mismatch are largest. As the package cools to room temperature, most of the CTE-based deformations that pull cracked surfaces of solder joints are gone and there is a potential for cracked surfaces to be in enough physical contact to provide acceptable continuity. In some cases, the cycle number at which opens are observed at temperature extremes is much shorter than the cycle at which the same opens are observable at room temperature. A schematic of a typical thermal cycling chamber, with the boards installed and connected to a data acquisition system, is shown in Fig. 59.4.

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Test Boards Test Devices Thermocouple Wires Temp Control Daisy Chain Resistance Wires Data Logger or Event Detector

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59.2.1.1 Effect of Lead-Free Conversion. The thermal cycling profile listed in Table 59.1 is also applicable to lead-free solders. Most of the damage accumulation occurs during the hightemperature dwell phase. If the high-temperature dwell cycle is shortened, the damage accumulated per cycle would be reduced. It is desirable to maintain a high-temperature dwell long enough to allow creep saturation. However, practical limitations prevent this; as a result, the recommendations in IPC-9701-A3 (Appendix B) are that a 10 min. dwell time be used, and where possible a 30 min. (or higher) dwell time could be used. Finite element analysis could be used to calibrate the experimental data and determine the effect of dwell time on long-term reliability. 59.2.1.2 Thermal Shock. Thermal shock experiments continuously cycle parts from a high to a low temperature very rapidly. These types of experiments are typically used as screening tools or to run parallel experiments on a known good part and a proposed new component to assess the relative performance of each part. Thermal shock experiments are quite rapid, with thermal shock test durations on the order of days rather than the months associated with thermal cycle test times. The main drawback of thermal shock experiments lies in the fact that these types of tests tend to induce failure modes not observed in the field. Additionally, even if solder joint fatigue can be induced, it is very difficult to map the high ramp rates associated with thermal shock loading conditions to the more gradual thermal loading conditions that occur in the field. Consequently, this test technique is limited to relative comparisons between packages in which the failure modes have been shown to be comparable under the same thermal shock test conditions.

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'Low to load 'Odd = low channel 0 'High to read 'Low to load 'MSBF high = MSB first 'High to read 'making line low for rest of cycle 'Low to load Read/discard the null bit 'High to read

Weibull Distributions The results of the temperature cycling tests described in Sec. 59.2.1 can be used to estimate the field operating life of the solder joint interconnects by using the acceleration transforms outlined in detail in Sec. 59.2.3.

However, to determine the field operating life, one needs to know the life of the parts in lab testing. The raw data obtained from the lab test could be fitted with a failure distribution to determine the mean life of the parts.Typical failure distributions include Weibull, Normal, Lognormal, and Exponential. For wear-out type of failures, the Weibull and Lognormal distributions are usually used, with Weibull being the most common. Weibull distributions are lowest value distributions derived from the weakest-link theory.4,5 Solder joint interconnects can be considered as connected in series. Usually, the failure of one joint at a critical location could cause the entire device to fail. The joints that fail early are usually located at the highest stress locations in the package. Devices with more resilient joints would not fail early. A Weibull distribution captures the minimum solder joint life, and the shape parameter captures the quality of the joints as a function of their construction and the applied stress.4 There are different types of Weibull distributions: one-parameter, two-parameter, and three-parameter. The threeparameter Weibull Probability Distribution Function (PDF)6 is as shown in Eq. 59.1.

t f (t ) =

1

t

'Reads the data into DataRead in 12 steps 'Move data by shifting left 1 bit. 'Ready for next bit outa[chipClk]~ 'Low to load DataRead:=DataRead+ina[chipDout] 'Xfer the data from pin chipDout outa[chipClk]~~ 'High to read outa[chipSel]~~ 'Put chip to sleep, for low power PotReading:=DataRead 'Finished data read for display PRI cog_LCD 'manage the LCD LCD.INITIALIZE_LCD 'initialize the LCD repeat LCD.POSITION (1,1) 'Go to 1st line 1st space LCD.PRINT(STRING("Pot=" )) 'Print Label LCD.PRINT_DEC(PotReading) 'print decimal value LCD.SPACE(4) 'erase over old data LCD.POSITION (2,1) 'Go to 2nd line 1st space LCD.PRINT_BIN(PotReading,BitsRead) 'Print it as bits.

(59.1)

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