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Effects of Printed Circuit Assembly Processes 57.4.2.1 Stencil Printing and Component Placement. Stencil printing and component placement generally do not cause reliability problems; however, poor stencil design or stencil printing or placement process control can create issues with solder volume and component cracking. Very low solder volume can result in weak solder joints that fail rapidly in thermal fatigue or by overload. In some cases, excessive solder volume can also accelerate solder joint fatigue failures because the compliance of the lead is reduced. Assuming that the stencil was designed and manufactured correctly, low solder volumes are usually due to small or missing paste bricks caused by a clogged stencil aperture, a stencil that needs cleaning, or improper stencil-printing parameters. Paste bridging can cause low solder volumes on some joints and high volumes on others because one joint may rob solder from another. Paste bridging may be caused by improper stencil design or stencil-printing parameters or by excessive force when placing chip carriers (e.g., PLCCs) and quad flat packs (e.g., PQFPs). Excessive placement force can also cause component cracking, particularly for small leadless ceramic components. 57.4.2.2 Reflow. The reflow process attaches SMT and some TH components to the PCB by melting solder paste to form solder joints using an oven with a controlled thermal profile (see Fig. 57.17) and, in some cases, a controlled atmosphere (often N2). Reliability problems that can arise due to improper reflow parameters can be grouped into three categories: damaged components, poor solder joints, and, for no-clean assemblies, cleanliness issues.
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FIGURE 57.17 Schematic reflow profile for eutectic Sn-Pb solder paste, FR-4 substrate and typical surface-mount components illustrating key features from a reliability perspective.
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Component Damage. The reflow process is responsible for most of the assemblyprocess-related component failures described in Sec. 57.2.3. These failures include molding compound delamination in plastic packages that have absorbed moisture (popcorning) and component failures due to overheating or thermal shock caused by excessive heating or cooling rates. All of these problems are preventable with good procedures and process controls. Package cracking can be prevented by storing components in the unopened dry bags in which they are shipped and by baking the moisture out of components that have been exposed to ambient conditions for too long. The manufacturer s recommendations regarding bake-out conditions and maximum exposure times before reflow should be followed, but a good general guideline is that packages that have been exposed to the atmosphere for more than 8 h should be baked to a moisture content below 0.1 percent by weight immediately prior to use; a bake of 125 C for 24 h is usually safe, although shorter times may be acceptable. Note that the same concerns apply for rework and second-side reflow of double-sided boards; for example, if the boards are stored for several days between reflow steps, bake-out before the second reflow step may be required.
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Component failures due to overheating or thermal shock can be prevented by monitoring the reflow temperature profile in several locations on the PCB to ensure that it meets the manufacturer s specifications for temperature-sensitive components Measuring the board profile is important because temperatures on the board can differ significantly from oven panel temperatures and from the ambient temperature in each oven zone Temperatures may also vary significantly across the board if there are large differences in the thermal mass of the components or in component density Areas of the assembly that are devoid of components are particularly sensitive to overheating, which can damage the laminate as well as any small components in the area Temperature variations across the assembly tend to be much smaller for ovens with predominantly convection heating than for ovens with predominantly infrared heating.
First, let s take a look at the program and then we will discuss what each part of the program is doing For our purposes, the signal will go between a logical 0 and logical 1 at the Propeller input pin For the Propeller with its CMOS circuitry, anything over half the 33 DC volts power (or 165 volts) is a seen as a high The input impedance of the lines in the input state is so high that they tend to float and will drift between 0 and 1 if they are not connected to anything (when defined as inputs) You can observe this if you run a finger close to a free input line with a wire sticking in the air like an antenna.
A poor reflow profile can also cause a variety of other problems; some of the others that also affect reliability will be mentioned here Poor Solder Joints A sound solder joint wets both the component termination and the substrate well, does not contain large or numerous voids, and does not have excessively thick intermetallic layers at the interfaces When using solder paste, the reflow profile is the dominant factor in achieving these goals Good wetting requires solderable incoming materials, but it also requires a reflow profile that gives the flux sufficient time to act in the right temperature range In addition, the profile should ensure that all parts of the board are at least 15 C over the melting temperature of the solder for at least several seconds.
Cold, improperly formed solder joints can occur if the solder does not fully melt or if oxidation prevents the solder balls in the paste from melting together The latter problem can be caused by an improper reflow profile or the wrong reflow atmosphere Voiding is generally caused by a reflow profile that does not permit enough time for the solvents in the paste to boil off before the solder melts All of these problems can be avoided by ensuring that the reflow profile of the board and reflow atmosphere (eg, O2 level) correspond to the manufacturer s recommendations for the solder paste Excessively long reflow times (time above the solder liquidus) can cause thick intermetallic layers to form at the interface between the solder and the component termination or substrate.
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